发明名称 |
Clock recovery system with triggered phase error measurement |
摘要 |
A measurement system includes a clock recovery system and a measurement module coupled to the clock recovery system. The clock recovery system has an associated response characteristic. The clock recovery system receives an input signal and recovers a clock signal from the input signal. The measurement module is coupled to the clock recovery system and measures a phase error signal received from the clock recovery system, time-referenced to a trigger signal that is applied to the measurement module, where the phase error signal represents the phase difference between the input signal and the recovered clock signal. A processor applies the associated response characteristic to the measured phase error signal to determine the phase of the input signal.
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申请公布号 |
US2007266275(A1) |
申请公布日期 |
2007.11.15 |
申请号 |
US20060407515 |
申请日期 |
2006.04.19 |
申请人 |
STIMPLE JAMES R;PALKO JADY |
发明人 |
STIMPLE JAMES R.;PALKO JADY |
分类号 |
G11B20/20;G06K5/04;G11B5/00 |
主分类号 |
G11B20/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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