发明名称 METHOD FOR FABRICATING ISOLATION LAYER IN FLASH MEMORY DEVICE
摘要 <p>A method for fabricating an isolation layer in a flash memory device is provided to improve STI(Shallow Trench Isolation) CMP(Chemical Mechanical Polishing) uniformity by reducing a polishing step of the isolation layer in a central region and an edge region within a die. A semiconductor substrate(21) including a cell region and a peripheral circuit region is prepared. The cell region and the peripheral circuit region are defined on the semiconductor substrate. A first trench is formed in the cell region and a second trench is formed in the peripheral circuit region simultaneously. The second trench has a line width wider than the line width of the trench of the cell region. A first gap-fill insulating layer(28) having a fast polishing speed to an HSS slurry is buried into the first trench. A second gap-fill insulating layer having a slow polishing speed to the first gap-fill insulating layer and the HSS slurry.</p>
申请公布号 KR20070109483(A) 申请公布日期 2007.11.15
申请号 KR20060042508 申请日期 2006.05.11
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, SUN MI
分类号 H01L21/76;H01L21/8247;H01L27/115 主分类号 H01L21/76
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