| 摘要 |
PROBLEM TO BE SOLVED: To modify a terminal by finding the terminal causing a floating error intrinsically in a semiconductor integrated circuit. SOLUTION: A verification device for a semiconductor integrated circuit comprises a circuit netlist sampling section 501 for sampling a netlist of a circuit from the information 500 of a circuit diagram, a circuit simulation executing section 502 for executing circuit simulation of the circuit on the basis of the sampled netlist, a limited impedance determining section 503 for determining existence of the limited impedance of the whole circuit on the basis of the netlist, a floating error terminal determining section 504 for determining existence of the limited impedance and determining existence of a floating error terminal, and an intrinsic floating error terminal determining section 505 for determining whether or not the terminal determined as a connection error terminal by the floating error determining section is causing an intrinsic floating error. COPYRIGHT: (C)2008,JPO&INPIT
|
