| 摘要 |
An output voltage error and a fluctuation drop of a pulse voltage are reduced to reduce higher harmonics and a common mode voltage and to improve the minimum on-pulse width in a low voltage region. The phase and magnitude of an input current command vector of a virtual input converter are controlled to control the magnitude of a virtual DC voltage. An intermediate voltage between input lines and a zero-voltage vector are used in the region where the input current command vector is at a low output voltage, and the maximum voltage between the input lines and the intermediate voltage between the input lines are used in the high output voltage region. A PWM control is made in a virtual output inverter to reduce the number of divisions in one operation period of duty pulses. The output voltage is controlled in the low-voltage region by using the intermediate voltage between the input lines. In the high-voltage region, the virtual DC is set at the ideally maximum constant, and the PWM control is made in the virtual output inverter. The switching pattern is determined by using the zero-voltage vector mode connected with an input intermediate phase. |
