| 摘要 |
A sigma-delta modulator 10 and an output rate reduction method are disclosed. The sigma-delta modulator comprises an integrator 11, an analogue-to-digital converter 12, and a controller 14. An input signal 101 is received by the integrator 11 to generate an integrated signal 111. The integrated signal 111 is then converted by the analogue-to-digital 12 converter into a digital modulation signal 121. The input signal 101 is received by the controller 14 to calculate an input signal power 141. The analogue-to-digital converter 12 can be controlled by the controller 14 based on a predetermined power value 144 and a sum of the input signal power 141 and a total quantization error power 142 . By the way mentioned above, the output rate of the sigma-delta modulator 10 is reduced. |
