| 摘要 |
A level shift circuit having a latch function includes a precharging PMOS transistor MP 1 which is turned on in a precharge period to interrupt a through current of an input stage, an NMOS transistor MN 1 which inputs data and performs discharging in a data input period, and a transistor MP 2 for holding data after level shifting. Thus, each of the transistors can have a minimum configuration. Since the level shift circuit has a latch function, it is possible to omit a circuit for latching input data, thereby reducing a circuit area.
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