发明名称 Bit synchronization for high-speed serial device testing
摘要 An apparatus for testing electronic devices employs a programmable device to adjust the timing of the strobes such that the strobes sample the bit stream from a device under test at or near the center of the bit position. The strobe time adjustment is performed based on pairs of strobe readings made around a number of different bit positions. The programmable device examines the pairs of strobe reading made around each of the different bit positions to determine whether or not a bit transition has occurred there. The programmable device selects the bit positions around which a bit transition has not occurred as eye candidates, and defines the center of the largest contiguous region of eye candidates as the center of the bit position.
申请公布号 US7296195(B2) 申请公布日期 2007.11.13
申请号 US20050120368 申请日期 2005.05.02
申请人 CREDENCE SYSTEMS CORPORATION 发明人 SAKAITANI KRIS
分类号 G06K5/04 主分类号 G06K5/04
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