| 摘要 |
Fast multiplication of two operands may be achieved by an interstitial product generator that generates an interstitial product from each of a plurality of mult-ibit segments of a multiplier. Generation of a final product is made faster because fewer interstitial products are created than in prior systems and, therefore, summing of the interstitial products is faster. In one embodiment, an interstitial product generator is used having registers to store a multiplicand value ("A"), shifted values of A and a 3 A value. A series of multiplexers and an inverter may generate interstitial product values from data in these registers. This embodiment is useful with four bit segments of the multiplicand.
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