发明名称 Method to selectively correct critical dimension errors in the semiconductor industry
摘要 A method to correct critical dimension errors during a semiconductor manufacturing process. The method includes providing a first semiconductor device. The first semiconductor device is analyzed to determine at least one critical dimension error within the first semiconductor device. A dose of electron beam exposure to correct the at least one critical dimension error during a subsequent process to form a second semiconductor device, or during modification of the first semiconductor device is determined. The subsequent process comprises providing a semiconductor structure. The semiconductor structure comprises a photoresist layer on a semiconductor substrate. A plurality of features are formed in the photoresist layer. At least one feature of the plurality of features comprises the at least one critical dimension error. The at least one feature comprising the critical dimension error is corrected by exposing the at least one feature to an electron beam comprising the dose of electron beam exposure, resulting in reduction of the size, or shrinkage, of the at least one feature comprising a critical dimension error.
申请公布号 US7294440(B2) 申请公布日期 2007.11.13
申请号 US20040710602 申请日期 2004.07.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 RANKIN JED H.;WATTS ANDREW J.
分类号 G03C5/00;G01R31/26;H01L21/00;H01L21/66 主分类号 G03C5/00
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