| 摘要 |
A semiconductor memory device is provided to improve an effective cycle ratio of the memory by decreasing a dummy cycle between a read cycle and a write cycle. In a semiconductor memory inputting an address by being synchronized to a reference clock signal and inputting/outputting data, a read address maintaining unit maintains an address. A write address maintaining unit maintains an address. A write address setting unit is installed between the read address maintaining unit and the write address maintaining unit, and sets to output the address from the read address maintaining unit in order to input the address to the write address maintaining unit at every write cycle. An address selection unit selects whether the address maintained in the read address maintaining unit is outputted during the read cycle, or whether the address maintained in the write address maintaining unit is outputted during the write cycle.
|
