发明名称 METHOD FOR GENERATING FAULT TREE FROM TIMED TRANSITION SYSTEM
摘要 A method for generating a fault tree from a timed transition system is provided to efficiently predict and analyze a fault mode of the timed transition system by generating the objective fault tree. A method for generating a fault tree from a timed transition system includes the steps of: when a state transition diagram of the timed transition system is input(S510), expanding the input state transition diagram by using a condition according to a time limit as a variable(S520); tracking a cause of occurrence of the most dangerous state by recognizing a node corresponding to a specific state in the expanded state transition diagram as the most dangerous state(S530); reconfiguring a previously defined fault analysis frame on the basis of the tracking result(S540); and automatically generating the fault tree of the timed transition system on the basis of the reconfigured fault tree analysis frame(S550).
申请公布号 KR100773762(B1) 申请公布日期 2007.11.09
申请号 KR20060096385 申请日期 2006.09.29
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM, TAE HO;LIM, CHAE DEOK
分类号 G06F11/28;G06F11/30 主分类号 G06F11/28
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