| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can simplify the processing of bit line contacts and make reliable writing. <P>SOLUTION: The bit line BL0 is shared by the first and second NAND units NAND0, NAND1. A first and second selection transistors 13d, 14e are connected in series between the bit line BL0 and the first NAND unit NAND0. The first selection transistor 13d has a first threshold voltage, and the second selection transistor 14e has a second threshold voltage higher than the 1st threshold voltage. The third and fourth selection transistors 13e, 14d are connected in series between the bit line BL0 and the second NAND unit NAND 1. The third selection transistor 13e has the second threshold voltage, and the fourth selection transistor has the first threshold voltage. <P>COPYRIGHT: (C)2008,JPO&INPIT |
