| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device having a large gate width and high resistance accuracy by forming two of MOSFETs having different gate insulating films in a damascene gate process. <P>SOLUTION: A semiconductor device has: a high-voltage MOSFET part receiving relatively high voltage supply and comprising an N<SP>-</SP>MOSn<SP>-</SP>layer 12 for high voltage and a P<SP>-</SP>MOSp<SP>-</SP>layer 13 for high voltage; and a low-voltage MOSFET part comprising an N<SP>-</SP>MOSn<SP>-</SP>layer 14 for low voltage and a P<SP>-</SP>MOSp<SP>-</SP>layer 15 for low voltage on the same substrate. The semiconductor device comprises: a first insulating film layer formed in a gate region in the high voltage MOSFET part with relatively small capacitance per unit area and comprising a two-layer structure of a buffer oxide film 2a and a polysilicon layer; and a second insulating film layer formed in the gate region in the low-voltage MOSFET part with relatively large capacitance per unit area and comprising an No oxide film 24 and a Ta<SB>2</SB>O<SB>5</SB>film 25. <P>COPYRIGHT: (C)2008,JPO&INPIT |
