发明名称 SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUFACTURING METHOD
摘要 A semiconductor wafer examination method that includes: preparing a wafer formed with a chip area for use as a semiconductor chip; firstly examining the wafer by probing; pressing an electrode of the wafer with a pressure member having a flat surface; and secondly examining the wafer by probing.
申请公布号 US2007259459(A1) 申请公布日期 2007.11.08
申请号 US20070775377 申请日期 2007.07.10
申请人 发明人 YUZAWA HIDEKI;KIJIMA KAZUHIRO
分类号 H01L21/66 主分类号 H01L21/66
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