| 摘要 |
To realize a type of mask ROM which can minimize the increase in the area while shortening the manufacturing cycle time. Multiple ROM memory cells with memory data stored in them corresponding to the presence/absence of via contacts are set in a matrix configuration between different metal wiring layers; the memory cells of the same row are connected to the same word line, the memory cells of the same column are connected to the same bit line; in addition, on each memory cell row, the gates are connected to the word line corresponding to that row, and the diffusion layer is connected to the diffusion layer of the adjacent diffusion transistor. In the read mode, by precharging the selected bit line to the prescribed potential and by setting the selected word line in the active state, the transistors on the selected row are set in the conductive state, and, corresponding to the presence/absence of the via contact of the selected memory cell, the selected bit line potential is set, and the memory data of the selected memory cell can be read. |
