发明名称 DMA module having plurality of first addressable locations and determining if first addressable locations are associated with originating DMA process
摘要 A DMA module includes an address generator to perform a write or read access to a location of an addressable memory, and an address counter to advance a stored address to an adjacent memory location. The address counter does not act on an internal register of the DMA module but instead is configured so that between reading an address value from the memory and writing the address value to the memory, the address counter is advanced once. The memory location at which the address value is read or written takes on the function of a register conventionally integrated in the DMA module. This approach reduces the space requirement of the DMA module, and the DMA module may be employed to control a large number of DMA processes that may mutually interrupt each other by providing a plurality of memory locations to store specifications of the DMA blocks.
申请公布号 US7293120(B2) 申请公布日期 2007.11.06
申请号 US20040751668 申请日期 2004.01.05
申请人 MICRONAS GMBH 发明人 GIEBEL BURKHARD
分类号 G06F13/00;G06F13/28;G06F12/02 主分类号 G06F13/00
代理机构 代理人
主权项
地址