发明名称 Locally asynchronous, block-level synchronous, configurable logic blocks with sub-threshold analog circuits
摘要 Embodiments utilize analog sub-threshold circuits to perform Boolean logic and soft-gate logic. These analog circuits may be grouped into configurable logic blocks that are locally asynchronous, but block-level synchronous. The Boolean logic, or function, performed by these blocks may be configured by programming bits. Other embodiments are described and claimed.
申请公布号 US7292069(B2) 申请公布日期 2007.11.06
申请号 US20050323950 申请日期 2005.12.30
申请人 INTEL CORPORATION 发明人 HANNAH ERIC C.;TENNENHOUSE DAVID
分类号 H03K19/20;H03K19/094 主分类号 H03K19/20
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