发明名称 Data communication system with hardware protocol parser and method therefor
摘要 A communication processor comprises a data link layer parser circuit ( 310 ) and a plurality of network layer parser circuits ( 322, 326 ). The data link layer parser circuit ( 310 ) receives a data link layer frame, and removes a data link layer header therefrom to provide a network layer frame as an output. Each network layer parser circuit corresponds to a different network layer protocol, and is selectively activated to receive the network layer frame and to process a network layer header therefrom to provide a transport layer frame as an output. The data link layer parser circuit ( 310 ) further examines a portion of the network layer frame to determine which of the plurality of network protocols is used. The data link layer parser circuit ( 310 ) activates a corresponding one of the plurality of network layer parser circuits ( 322, 326 ) in response, while keeping another one of the plurality of network layer parser circuits ( 322, 326 ) inactive.
申请公布号 US7293113(B1) 申请公布日期 2007.11.06
申请号 US20030447824 申请日期 2003.05.28
申请人 ADVANCED MICRO DEVICES, INC. 发明人 KRISHNA GOPAL;KANURI MRUDULA
分类号 G06F15/16;G06F1/32 主分类号 G06F15/16
代理机构 代理人
主权项
地址