发明名称 |
Sub-milliohm on-chip interconnection |
摘要 |
A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom conductive layer creates a first electrical coupling of a first location and a second location of the integrated circuit device. A dielectric layer is formed overlying the bottom conductive layer. A top conductive layer is formed overlying the dielectric layer. The top conductive layer is coupled to the bottom conductive layer through openings in the dielectric layer to form a second electrical coupling of the first location and the second location. A metal wire is bonded to the top conductive layer to form a third electrical coupling of the first location and the second location to complete the very low resistivity interconnection in the manufacture of the integrated circuit device.
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申请公布号 |
US7291551(B2) |
申请公布日期 |
2007.11.06 |
申请号 |
US20030403439 |
申请日期 |
2003.03.31 |
申请人 |
DIALOG SEMICONDUCTOR GMBH |
发明人 |
JOERGER WOLFGANG;STELLBERGER ACHIM;KELLER MICHAEL |
分类号 |
H01L21/00;H01L21/768;H01L23/49;H01L23/495 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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