发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 A semiconductor integrated circuit device is provided to achieve microfabrication architecture by forming a diffusion layer having a simple shape for improving symmetric balance thereof. A semiconductor memory comprises a first and a second bit lines, a plurality of word lines, a plurality of memory cells(MC), a first p-well region(PW1) and a second p-well region(PW2) located parallel to the bit lines, an n-well region(NW1) located between the first and the second p-well regions, a first wiring supplying a first electric potential to the first and the second p-well regions and a second wiring supplying a second electric potential to the n-welll region. Each memory cells comprise a first inverter(INV1) and a second inverter(INV2). A first and a third N-channel MOS transistor(TN3) are formed at the first p-well region. A second and a forth N-channel MOS transistor(TN4) are formed at the second p-well region. A first and a second P-channel MOS transistor(TP1,TP2) are formed at the n-well region.
申请公布号 KR20070106960(A) 申请公布日期 2007.11.06
申请号 KR20070107160 申请日期 2007.10.24
申请人 KABUSHIKI KAISHA HITACHI SEISAKUSHO(D/B/A HITACHI, LTD.) 发明人 OSADA KENICHI;MINAMI MASATAKA;IKEDA SHUJI;ISHIBASHI KOICHIRO
分类号 H01L27/10;H01L27/11;H01L21/8244 主分类号 H01L27/10
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