发明名称 Switching circuit using multiple common-drain JFETs for good heat dissipation capability and small PCB layout area
摘要 A switching circuit uses multiple common-drain JFETs to serve as the low-side switches of the switching circuit, and each of the low-side JFET is coupled between a high-side switch and a power node. Since a JFET can endure high voltage at both drain side and source side, and has good heat dissipation capability at drain side, the drain of the low-side JFET is coupled to the power node to enhance the heat dissipation capability and accordingly, all the low-side JFETs are allowed to be packaged in a same package to reduce the PCB layout area.
申请公布号 US2007252636(A1) 申请公布日期 2007.11.01
申请号 US20070822169 申请日期 2007.07.03
申请人 TAI LIANG-PIN;CHEN JIUN-CHIANG 发明人 TAI LIANG-PIN;CHEN JIUN-CHIANG
分类号 H03K17/687;H01L29/15;H03K17/693 主分类号 H03K17/687
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