| 摘要 |
A semiconductor device comprises a decoupling capacitance in which a P-type MOS capacitor C 1 is connected in series with an N-type MOS capacitor C 2 between VDD and GND. The source and drain 2 b of the P-type MOS capacitor C 1 are connected to VDD. The source and drain 2 a of the N-type MOS capacitor C 2 are connected to GND. The gate electrode 5 a of the P-type MOS capacitor C 1 is connected to the gate electrode 5 b of the N-type MOS capacitor C 2 . VDD is connected to the N-well region 1 b of the channel of the P-type MOS capacitor C 1 , and GND is connected to the P-well region 1 a of the channel of the N-type MOS capacitor C 2 . Reliability of decoupling capacitance is improved, making it possible to place elements efficiently.
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