发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a technique capable of improving the manufacturing yield of a semiconductor device having multilayer interconnection. SOLUTION: A manufacturing method of a semiconductor device comprises: a process for forming a pattern of a first resist film by the total surface exposure of a wafer on an insulating film 4, removing a first resist film at the periphery of the wafer by the peripheral exposure of the wafer, forming a via 7 in the insulating film 4 at a chip formation region by etching with the first resist film as a mask, and removing the insulating film 4 at a peripheral exposure region; a process for forming a pattern of a second resist film by the total surface exposure of a wafer on the insulating film 4, removing a second resist film at the periphery of the wafer by the peripheral exposure of the wafer, and forming a wiring groove 11 in the insulating film 4 at the chip formation region by etching with the second resist film as a mask; a process for cleaning and removing a copper-plated film at the periphery of the wafer after forming the copper-plated film; and a process for forming wiring 14 by polishing the copper-plated film by a CMP method. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007287731(A) 申请公布日期 2007.11.01
申请号 JP20060109901 申请日期 2006.04.12
申请人 RENESAS TECHNOLOGY CORP 发明人 SEIHIKARI TAKESHI
分类号 H01L21/3205 主分类号 H01L21/3205
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