| 摘要 |
A method of forming a metal line using a dual damascene is provided to prevent excessive etching of a trench corner by simultaneously subjecting a trench and a via hole to etching. A bottom interlayer dielectric and an etch stop layer are formed on a semiconductor substrate, and then are partially etched to form a groove for defining a via hole region. A negative photoresist pattern is formed to define a trench region on which a top wiring of a metal line is formed. The etch stop layer is patterned to form a via hole etching pattern(108a). After the negative photoresist pattern is removed, a top interlayer dielectric is formed on upper surfaces of the via hole etching pattern and the bottom interlayer dielectric. The top interlayer dielectric and the via hole etching pattern are partially etched to form a trench region, and the bottom interlayer dielectric is etched to form a via hole(122).
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