发明名称 TESTING APPARATUS, PROGRAM, AND TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To efficiently detect defects regarding a physical arrangement of a storage cell. SOLUTION: The testing apparatus for testing a memory to be tested is equipped with: an address generation section for generating a physical address to be supplied to a memory block inside the memory to be tested; a plurality of mask registers arranged corresponding to each input bit which constitutes an input address supplied to the memory to be tested, to set whether a plurality of physical bits constituting the physical address are masked or not, for every physical bit; a plurality of mask computing sections arranged corresponding to each input bit to respectively mask the physical address according to a value of the mask register corresponding to the input bit; a plurality of logical computing sections arranged corresponding to each input bit to respectively output bit data obtained as a result of applying the predetermined logical computing operation to the mask result obtained from the mask computing section; and an address supply section for supplying the input address including the plurality of input bits output from the plurality of logical computing sections. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007287213(A) 申请公布日期 2007.11.01
申请号 JP20060111576 申请日期 2006.04.14
申请人 ADVANTEST CORP 发明人 FUJIWARA MASAKI
分类号 G11C29/10;G01R31/28 主分类号 G11C29/10
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