发明名称 |
Dynamic RAM memory circuit, has recreation circuit recreating memory cells based on selection information, and word line decoder selecting one of word lines depending based on address information |
摘要 |
<p>The circuit has a memory cell area (2) with dynamic memory cells (3) that are arranged in word lines (5) and bit lines (6), and a sampling unit (20) provided for making selection information available. A recreation circuit (10) recreates the memory cells based on the selection information, where the sampling unit has a condition memory to store the selection information. A word line decoder (7) selects one of the word lines depending on an address information, where the circuit has an address transmitter that provides the address information for addressing each of the word lines. An independent claim is also included for a method for recreating dynamic memory cells in a memory cell field.</p> |
申请公布号 |
DE102006020098(A1) |
申请公布日期 |
2007.10.31 |
申请号 |
DE20061020098 |
申请日期 |
2006.04.29 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
PROELL, MANFRED;SCHROEDER, STEPHAN;RUF, WOLFGANG;HAAS, HERMANN |
分类号 |
G11C11/406 |
主分类号 |
G11C11/406 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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