发明名称
摘要 Disclosed is an improved method for fabricating a DRAM cell capacitor which can prevent over-etching of polysilicon storage node. The method includes the steps of etching a first insulating layer on a semiconductor substrate to form a storage contact hole, filling the storage contact hole with a first conductive material to form a storage contact plug, forming a second insulating layer over the first insulating layer including the storage contact plug, forming a mask over the second insulating layer to define a storage node region, using the mask and etching the second and first insulating layers to form an opening therein to an upper surface of the storage contact plug, and filling the opening with a second conductive material to form a storage node.
申请公布号 JP3999403(B2) 申请公布日期 2007.10.31
申请号 JP19990118744 申请日期 1999.04.26
申请人 发明人
分类号 H01L21/8242;H01L27/108;H01L21/02;H01L21/768 主分类号 H01L21/8242
代理机构 代理人
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