发明名称 Integrated circuit for storing data, has memory circuit with inverter circuits, where strengthening and/or weakening of transistors in corresponding inverter circuits is realized by change of channel lengths and breadths of transistors
摘要 <p>The circuit has a programmable circuit unit (10) comprising a programmable unit (F) e.g. fuse, where a programming state of the unit (F) is analyzed repeatedly, and a memory circuit (20) for storing a state of memory dependent on a programming state of the programmable unit. The memory circuit has inverter circuits (21, 22), where strengthening and/or weakening of n-channel and p-channel transistors (N2, P2, N4, P3) in the corresponding inverter circuits is realized by change of channel lengths and breadths of the transistors. An independent claim is also included for a method for operating an integrated circuit.</p>
申请公布号 DE102006019075(A1) 申请公布日期 2007.10.31
申请号 DE20061019075 申请日期 2006.04.25
申请人 INFINEON TECHNOLOGIES AG 发明人 PFEFFERL, KARL-PETER
分类号 G11C17/16;G11C29/52 主分类号 G11C17/16
代理机构 代理人
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