发明名称 |
NANOWIRE TRANSISTOR WITH SURROUNDING GATE |
摘要 |
<p>One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous semiconductor material is formed on a crystalline substrate, and a solid phase epitaxy process is performed to crystallize the amorphous semiconductor material using the crystalline substrate to seed the crystalline growth. The pillar has a sublithographic thickness. A transistor body is formed in the crystallized semiconductor pillar between a first source/drain region and a second source/drain region. A surrounding gate insulator is formed around the semiconductor pillar, and a surrounding gate is formed around and separated from the semiconductor pillar by the surrounding gate insulator. Other aspects are provided herein.</p> |
申请公布号 |
WO2007120492(A1) |
申请公布日期 |
2007.10.25 |
申请号 |
WO2007US08123 |
申请日期 |
2007.04.03 |
申请人 |
MICRON TECHNOLOGY, INC.;FORBES, LEONARD |
发明人 |
FORBES, LEONARD |
分类号 |
H01L21/336;H01L21/20;H01L21/8242;H01L29/06;H01L29/786 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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