发明名称 Dual voltage single gate oxide I/O circuit with high voltage stress tolerance
摘要 An I/O output circuit is disclosed for interfacing a first system operating at a first voltage with a second system operating at a second voltage higher than the first voltage. The I/O output circuit includes an output stage module having one or more PMOS transistors and one or more NMOS transistors for coupling with the second system. A switch module is coupled to the output stage module for selectively providing the PMOS and NMOS transistors with various gate biases. A feedback circuit is coupled between an I/O pad that couples the output stage module to the second system and the switch module for controlling the switch module to generate the gate biases in response to a voltage at the I/O pad, thereby ensuring voltages across gates of the PMOS and NMOS transistors to be within a predetermined range.
申请公布号 US2007247190(A1) 申请公布日期 2007.10.25
申请号 US20060397213 申请日期 2006.04.04
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHEN KER-MIN
分类号 H03K19/0175 主分类号 H03K19/0175
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