| 摘要 |
PROBLEM TO BE SOLVED: To provide a design system of a semiconductor integrated circuit capable of reducing influence received by systematic manufacturing variations. SOLUTION: This design system has an extracting module 12 extracting the systematic manufacturing variations from manufacturing variations information acquired from a shape measuring result of a basic pattern, an analytical pattern acquiring module 14 acquiring an analytical pattern shape of a basic circuit including the basis pattern by process simulation using a parameter provided from the systematic manufacturing variations and a performance result of the process simulation, a delay characteristic calculating module 15 calculating a signal delay characteristic of the basic circuit by using the analytical pattern shape, and a risk calculating module 16 calculating failure occurrence risk of causing failure caused by the systematic manufacturing variations in the basic circuit by comparing a design pattern shape of the basic circuit with the analytical pattern shape. COPYRIGHT: (C)2008,JPO&INPIT
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