发明名称 WELL BIAS CIRCUIT IN MEMORY DEVICE AND METHOD OF OPERATING THE SAME
摘要 A well bias circuit of a memory device and a method of operating the same are provided to prevent the damage of the circuit by setting a well bias as 0V after discharging a high voltage applied to the well during a power-on period of the memory. A well voltage supply part(100) applies a high voltage to a well for erasing data of a memory cell. A well discharge part(300) discharges the high voltage applied to the well by a first control signal after data erase of the memory cell is completed. A well-to-ground circuit part(200) maintains the well bias ground by a second control signal, in case except the data erase of the memory cell. A control block(400) enables the well discharge part for a constant time during power-on.
申请公布号 KR100769811(B1) 申请公布日期 2007.10.23
申请号 KR20060088646 申请日期 2006.09.13
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KANG, WON KYUNG
分类号 G11C5/14 主分类号 G11C5/14
代理机构 代理人
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