| 摘要 |
A page buffer circuit of a memory device and a program method thereof are provided to increase integration density by reducing the number of components of the page buffer of the memory device. According to a page buffer circuit of a memory device including a plurality of multi level cells connected to at least a pair of bit lines, an MSB(Most Significant Bit) latch(210) stores upper sensing data by sensing a voltage of a sensing node in response to a control signal, and outputs inverted upper sensing data or stores input data, and outputs inverted input data. An LSB(Least Significant Bit) latch(220) stores and outputs lower sensing data by sensing a voltage of a sensing node in response to a control signal, or stores and outputs input data transferred through the upper bit latch. A data input/output circuit is connected to the MSB latch and the data input/output line, and performs to input/output sensing data or program data. An inversion output circuit inverts the data stored in the LSB latch and then outputs the inverted data to the MSB latch. An MSB verify circuit outputs a verify signal in response to the data stored in the upper bit latch. An LSB verify circuit outputs a verify signal in response to the data stored in the LSB latch.
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