发明名称 Clock synchronized nonvolatile memory device
摘要 A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.
申请公布号 US7286397(B2) 申请公布日期 2007.10.23
申请号 US20050088945 申请日期 2005.03.25
申请人 RENESAS TECHNOLOGY CORPORATION 发明人 MIWA HITOSHI;KOTANI HIROAKI
分类号 G11C11/34;G11C11/56 主分类号 G11C11/34
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