CO-INTEGRATION OF MULTI-GATE FET WITH OTHER FET DEVICES IN CMOS TECHNOLOGY

摘要

The present invention relates to a CMOS circuit device on a SOI substrate with an oriented silicon surface, comprising on a first substrate region a FET that has a FET channel region of a first conductivity type, and comprising on a second substrate region a FinFET that has a FinFET channel region of a second conductivity type which is opposite to the first conductivity type. The invention also relates to a method for fabricating such a CMOS circuit device. The fabrication of the multi-gate planar FET comprises, at an intermediate step, forming a FET channel stack with an alternating sequence of layers of a FET material and of a sacrificial material and containing main FET -channel faces, which have the same orientation as the oriented silicon surface. According to the invention, a co-integration of multi-gate FET devices is achieved that ensures high carrier mobilities for both NMOS and PMOS FETs.