| 摘要 |
<p>A present invention is a method, and resulting device, for fabricating memory cells with an extremely small area and reduced standby current. The small area is accomplished by a judicious use of spacers (109) which allows a tunnel window (113) of a storage device to be fabricated in close proximity to an associated select gate (119<SUB>82</SUB>) and with a reduced gate width (120) compared to typical devices. The tunnel window is recessed within an upper surface of a substrate (101). The tunnel window recess is made possible by selective etching of the substrate and oxides {103, 105, 107} covering the substrate. A substantial reduction in the size of a tunnel window means device scaling is possible far beyond what is attainable with standard photolithography. Standby current is reduced significantly by fabricating a select device with complementary material types for the gate compared with the adjacent source/drain regions.</p> |
