| 摘要 |
<p>A NAND flash memory device and its manufacturing method are provided to reduce remarkably a single string NAND cell by making control gates separated from each other using self-aligned spacers and forming lightly doped regions under the spacers as source/drain regions. A NAND flash cell includes a semiconductor substrate(100) of a first conductive type, a plurality of lightly doped regions of a second conductive type, control gates and self-aligned spacers. The plurality of lightly doped regions are formed under an upper surface of the substrate. The control gates(124) are formed on a stacked structure of the substrate, wherein the stacked structure is composed of a thermal oxide layer, a nitride layer and a CVD oxide layer. The self-aligned spacers(132) are formed at sides of the stacked structure and the control gate.</p> |
