| 摘要 |
A free running clock circuit includes a switching circuit for switching between first and second logic states at a predetermined frequency based upon a trip voltage. The switching circuit has an inherent temperature profile associated therewith. A voltage divider circuit outputs a defined trip voltage that is compensated over the temperature to offset the temperature profile of said switching circuit to provide an overall temperature compensated operation for the free running clock circuit. The voltage divider circuit has a top programmable resistor array connected in series with at least two programmable resistor arrays between two supply terminals of differing voltages.
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