发明名称 |
FIELD EFFECT TRANSISTOR STRUCTURE WITH AN INSULATING LAYER AT THE JUNCTION |
摘要 |
A method of making a FET includes forming a gate structure (18), then etching cavities on either side. A SiGe layer (22) is then deposited on the substrate (10) in the cavities, followed by an Si layer (24). A selective etch is then carried out to etch away the SiGe (22) except for a part of the layer under the gate structure (18), and oxide (28) is grown to fill the resulting gap. SiGe source and drains are then deposited in the cavities. The oxide (28) can reduce junction leakage current. |
申请公布号 |
WO2007069151(A3) |
申请公布日期 |
2007.10.18 |
申请号 |
WO2006IB54666 |
申请日期 |
2006.12.07 |
申请人 |
NXP B.V.;CURATOLA, GILBERTO, A.;NUTTINCK, SEBASTIEN |
发明人 |
CURATOLA, GILBERTO, A.;NUTTINCK, SEBASTIEN |
分类号 |
H01L21/336;H01L29/06;H01L29/165;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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