发明名称 Method of wafer level chip size packaging
摘要 A method of wafer level chip size packaging includes the steps of: grinding a wafer on a back surface to a predetermined thickness; sawing the wafer into a plurality of wafer slices; spray coating a photo resist layer on top of the wafer slice; applying a lithography process to form contact windows on the wafer slice; forming a pattern on the wafer slice by printing or sputtering, in which bottom ends of the pattern are connected with the respective contact windows and an upper surface of the pattern forms protrusively a plurality of under bump metals (UBM); spray coating a solder mask on top of the pattern; applying another lithography process to form apertures on the respective UBMs; implanting solder balls to the respective apertures by printing; and finally sawing the wafer slice into separate dies.
申请公布号 US2007243663(A1) 申请公布日期 2007.10.18
申请号 US20070783249 申请日期 2007.04.06
申请人 CHEN HSIH-CHUN 发明人 CHEN HSIH-CHUN
分类号 H01L21/00 主分类号 H01L21/00
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