| 摘要 |
Pre-switching of output signals of a register within a registered memory module is described herein. The register receives a plurality of signals at respective input terminals, and the register stores the input signals in response to transitions of a clock signal. The register further includes output terminals on which the stored input signals are present as high or low level output signals. The high and low level output signals of the output terminals are applied to a plurality of memory devices. The high and low level output signals, which are present on the output terminals, are pre-switched to intermediate level signals having a signal height greater than that of the low level output signal and less than that of the high level output signal. The pre-switching occurs between following transitions of the clock signal determined for storing the input signals.
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