| 摘要 |
A computer is adapted for self-validation using a dedicated validation circuit or process. The validation circuit may include a timing circuit for activating the validation process, a verification circuit for verifying the computer is in compliance with a pre-determined set of conditions and an enforcement circuit for imposing a sanction on the computer when the computer is found in a non-compliant state. The validation circuit may include cryptographic circuitry or processes for hashing and digital signature verification. The validation circuit is preferable small and portable to help ensure that the validation circuit itself is not vulnerable to a widespread attack. A self-validation method for use by a computer is also disclosed.
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