发明名称 Multiple mode power throttle mechanism
摘要 A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.
申请公布号 HK1075108(A1) 申请公布日期 2007.10.18
申请号 HK20050107416 申请日期 2005.08.24
申请人 INTEL CORPORATION 发明人 JAMES BURNS;DAVID AYERS;MARSHA ENG;EDWARD GROCHOWSKI;STEFAN RUSU;VIVEK TIWARI
分类号 G06F;G06F1/32;G06F9/318 主分类号 G06F
代理机构 代理人
主权项
地址