发明名称 Prepreg und Leiterplatte und Verfahren zu deren Herstellung
摘要 <p>The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of materials, physical properties, and a combination of the materials of an insulating layer. The present invention also provides a method for manufacturing the prepreg and the circuit board. The prepreg of the present invention includes a laminate (3) including at least one first layer (2) and at least one second layer (1). The first layer (2) is an insulating layer that includes a resin. The second layer (1) has pores that connect an upper and a lower surface of the second layer (1), and the upper and the lower surface of the second layer (1) differ from each other in at least one selected from open are ratio and average pore diameter. Using this prepreg makes it possible to provide a circuit board that is characterized, e.g., by low interstitial via connection resistance, excellent connection stability, and high durability. <IMAGE> <IMAGE></p>
申请公布号 DE60217793(T2) 申请公布日期 2007.10.18
申请号 DE2002617793T 申请日期 2002.10.23
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD. 发明人 NAKAGIRI, YASUSHI;SUZUKI, TAKESHI;ECHIGO, FUMIO
分类号 H05K1/03;B32B5/26;B32B27/04;C08J5/24;H05K3/40;H05K3/46 主分类号 H05K1/03
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