发明名称 PULSE GENERATION CIRCUIT, AND ELECTRONIC CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To achieve a stable short-pulse generation circuit without any erroneous operation by excluding the erroneous operation of a logic circuit and the generation of spike-like noise, when generating a narrow pulse of about transition time of the operation of the logic circuit. <P>SOLUTION: The pulse generation circuit comprises: M stages of cascaded delay circuits (M: a positive even number); an AND circuit for calculating the AND of output D<SB>i</SB>at the i-th stage (i: an even number of 1&le;i&le;M) of a delay circuit and the NAND XD<SB>i-1</SB>of the output of the (i-1)-th stage in the delay circuit; an OR circuit for calculating the OR of the output of the AND circuit; a logical circuit for outputting a signal at prescribed timing when the NAND XD<SB>1</SB>of the output D<SB>1</SB>at the first stage of the delay circuit, and the AND XD<SB>1</SB>D<SB>M</SB>of the output D<SB>M</SB>of the final stage of the delay circuit, are false; and a means for deactivating at least one of the AND circuit and the OR circuit when the output of the logical circuit is true. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007274680(A) 申请公布日期 2007.10.18
申请号 JP20070058449 申请日期 2007.03.08
申请人 SEIKO EPSON CORP 发明人 IKEDA KATSUYUKI
分类号 H03K3/66;H03K3/03;H03K3/354;H03L7/00;H03L7/081 主分类号 H03K3/66
代理机构 代理人
主权项
地址