| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an instruction processor and an instruction processing method, capable of efficiently attaining high-speed processing by a processor on an instruction subjected to compression processing or encryption processing with considerations so that it is sufficiently suitable for practical use. <P>SOLUTION: The instruction processor comprises an instruction cache 63c to which an instruction not subjected to compression processing or encryption processing is written from the outside; a data cache 63d to which an instruction subjected to compression processing or encryption processing is written; a processor 63a executing processing based on the instruction written in the instruction cache 63c and performing compression release processing or encryption decoding processing to the instruction written in the data cache 63d; and a special cache 63e to which the instruction subjected to compression release processing or encryption decoding processing by the processor 63a is written, the special cache providing the resulting instruction to processing by the processor 63a. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
