发明名称 UNIT CELL OF SEMICONDUCTOR INTEGRATED CIRCUIT, WIRING METHOD USING THE UNIT CELL AND WIRING PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a unit cell of a semiconductor integrated circuit by which wiring efficiency can be improved when the unit cell is used to arrange functional circuit blocks, and to provide a wiring method using the unit cell and a wiring program. SOLUTION: Auxiliary power wiring area TA2a to TA2c are formed in a unit cell 2 with a reference of grids which are provided in the X direction from the side of the cell at every basic cell width BCW. Input signal terminal AT2 to DT2 and an output signal terminal YT2 are arranged in a manner to have at least one wiring connection part outside the auxiliary power wiring area TA2a to TA2c. Thus, wiring other than the signal wiring can be connected to the auxiliary power wiring area TA2c. The unit cells are arranged like a matrix to form a functional circuit block 20, thereby forming the auxiliary power wiring area at a pitch of the basic cell width BCW to penetrate the functional circuit block 20 in Y direction. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007273762(A) 申请公布日期 2007.10.18
申请号 JP20060098218 申请日期 2006.03.31
申请人 FUJITSU LTD 发明人 KOMAKI MASAKI
分类号 H01L21/82;H01L27/118 主分类号 H01L21/82
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