发明名称 SHALLOW TRENCH AVOIDANCE IN INTEGRATED CIRCUITS
摘要 <p>Diffusion regions in a standard cell design are bridged across cell boundaries. Shallow trench isolation is reduced and nitride passivation thickness variation is reduced.</p>
申请公布号 WO2007117893(A2) 申请公布日期 2007.10.18
申请号 WO2007US64459 申请日期 2007.03.21
申请人 INTEL CORPORATION;DAVIS, JEFFREY;DODDAMANI, RAJASHRI;JOO, BYUNGHA;NGUYEN, DUC;SURTI, DARSHANA;YIM, EVA 发明人 DAVIS, JEFFREY;DODDAMANI, RAJASHRI;JOO, BYUNGHA;NGUYEN, DUC;SURTI, DARSHANA;YIM, EVA
分类号 H01L21/98;H01L27/04 主分类号 H01L21/98
代理机构 代理人
主权项
地址