发明名称 Method and apparatus for functionally verifying a physical device under test
摘要 Method, apparatus, and computer readable medium for functionally verifying a physical device under test (DUT) is described. In one example, verification test data is generated for the physical DUT using a constraint-based random test generation process. For example, the architecture, structure, and/or content of the verification test data may be defined in response to constraint data and an input/output data model. A first portion of the verification test data is applied to the physical DUT. Output data is captured from the physical DUT in response to application of the first portion of the verification test data. A second portion of the verification test data is selected in response to the output data. Expected output data for the physical DUT associated with the verification test data may be generated and compared with the output data captured from the DUT to functionally verify the design of the DUT.
申请公布号 US7284177(B2) 申请公布日期 2007.10.16
申请号 US20050095226 申请日期 2005.03.31
申请人 VERISITY, LTD. 发明人 HOLLANDER YOAV Z.;KASHAI YARON E.
分类号 G01R31/28 主分类号 G01R31/28
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