| 摘要 |
A phase locked loop and a phase locking method are provided to reduce a locking time of the PLL(Phase Locked Loop) by supplying an initial voltage corresponding to a period of a dividing signal to a VCO. A phase locked loop includes a phase/frequency detector(100), an initial voltage generator(200), a charge pump(300), a loop filter(400), and a VCO(Voltage Controlled Oscillator)(500). The phase/frequency detector compares a reference clock signal from outside with a fed-back output clock signal and generates a pulse signal. The initial voltage generator divides the reference clock signal to generate a divided signal and supplies an initial voltage corresponding to one period of the divided signal. The charge pump generates a current, which is proportional to a pulsewidth of the pulse signal. The loop filter adjusts the initial voltage level according to the current from the charge pump. The VCO outputs the output clock signal, which has a frequency corresponding to the voltage, which is supplied to the loop filter. |
